A converter is used, for example, to convert the direct voltage of an intermediate circuit into a three-phase alternating current for driving an electric motor having three motor phases.
FIG. 1 is a circuit diagram of a converter U as described, for example, in German Published Patent Application No. 10 2005 061 388. Each motor phase U, V, W of an electric motor M is connected either to the positive intermediate-circuit voltage +Uz or to the negative intermediate-circuit voltage −Uz by half-bridge circuits B, each having two power transistors T. To that end, a logic PWM-signal PWM is applied to each half-bridge B made up of two serially-connected power transistors T, in each case one power transistor being driven directly, the other via an inverter I. In this manner, each motor phase is either at +Uz (logic 1) or at −Uz (logic 0), depending on the logic level of the respective PWM-signal. It should be noted that, when switching between +Uz and −Uz, a brief dead time must be observed during which both power transistors T of a half-bridge B are non-conductive, in order to avoid a short circuit of the intermediate-circuit voltage.
FIG. 2 shows one possibility for generating PWM-signals in simplified form. The PWM-signals are pulse-width modulated square-wave signals. For each motor phase U, V, W, a delta voltage Ud is compared to a control voltage Us, Vs, Ws. For example, if control voltage Vs is above delta voltage Ud, then PWM-signal PWM for motor phase V is logic 1, and motor phase V is connected to positive intermediate-circuit voltage +Uz. If the control voltage is below the delta voltage, then the associated PWM-signal is logic 0, and the associated motor phase is connected to negative intermediate-circuit voltage −Uz. Thus, the higher the control voltage, the longer the respective motor phase is connected to +Uz, and vice versa. The average voltage applied to the specific motor phase is thus adjusted via the pulse duty factor of the PWM-signal.
The higher the frequency of delta voltage Ud, also referred to as the PWM-frequency, the better the voltage in the motor phase, predefined by the control voltage, can be adjusted by pulse width modulation. Higher PWM-frequencies result in a more rapid attainment of the necessary motor currents as well as a decrease in current ripple and a decrease in eddy current losses associated with it.
In digitally controlled converters, the analog delta signal of FIG. 2 is replaced by a counting ramp. The control voltage is predefined as a variable digital reference value, the value range of the reference value, for reasons explained in greater detail below, corresponding approximately to the value range of the counting ramp, but being somewhat smaller.
If, on one hand, highly resolved values are desired for the reference value, and on the other hand, high PWM-frequencies, the necessary counting frequency may then become very high, because the counting frequency is proportional to the product of the required resolution of the reference value and the PWM-frequency. The clock-pulse rates of commonly-used and affordable digital circuits may not be adequate for this purpose.